Cherry Blossom beta

PCB design, reimagined for AI.

A modern, AI-first EDA tool for hobbyists and professional engineers. Describe your board in plain English and Cherry Blossom returns a real, fab-ready PCB — components placed, nets named, footprints linked.

Download the betaSee what it catches
macOS
Windows
Linux
Under 9 MB · installs in seconds
Cherry BlossomNewOpenSaveExport
schematicpcbcadbom
evaluating board.tsx...
AI Assistant

AI Assistant

Ask me to modify your circuit

Add a 10k pullup resistor to VCCConnect all grounds togetherExplain this circuit's power section
claude-sonnet-4-6·anthropic
Describe your board to start block-by-block design...

Two students. Four pedigrees. One PCB editor.

Built by engineers previously at

OpenAIIntelShopifyScale AITeslaOpenAIIntelShopifyScale AITeslaOpenAIIntelShopifyScale AITesla
How it works

A compiler that drafts.
A harness that checks.

Cherry Blossom pairs an AI that turns your prompt into a real schematic with a verification harness that catches the bugs DRC lets through.

The compiler

One prompt becomes a real, editable schematic. Components addressable by refdes. Nets named. Footprints linked. Drop into KiCad if you want to keep going there.

Cherry BlossomNewOpenSaveExport
schematicpcbcadbom
evaluating board.tsx...
Learn more

The harness

Every check runs on save. Decoupling. Footprints. BOM second-sources. You see the flag and the suggested fix before you commit a $40,000 order.

Cherry BlossomNewOpenSaveExport
schematicpcbcadbom
Learn more

Built on an open format,
not a black box.

Under every board is Circuit JSON, an open, low-level circuit representation. One text format you own renders the schematic and PCB, and produces Gerbers, a BOM, and SPICE — no proprietary lock-in.

SchematicPCB layoutGerbersBill of materialsSPICE
READ MORE
Inside the editor

Draft. Verify. Ship.
One surface.

The full design loop happens in one window. No tab-switching. No separate verification step.

Cherry BlossomNewOpenSaveExport
Search components...
Recent
ESP32-S3-WROOM-1
MCU · Espressif
DRV8313
3-phase gate driver
AS5048A
Hall encoder · 14-bit
TPS62823
DC-DC step-down
USB-C 16-pin
Connector · 5A rated

Prompt-to-schematic

Type "BLDC motor controller, ESP32-S3 brain, USB-C input." Get a real, editable schematic in seconds. Not a render. Not a block diagram. The actual board.

AI Assistant
2 errors, 1 warning — couldn't auto-fix
  • errorU3 TPS62823 — footprint 0805, layout expects 0603
  • errorR7 EN pull-up — open-drain output has no pull-up to 3V3
  • warningU1 ESP32-S3 — 100nF decoupling missing on VDD3P3_RTC

Live harness flags

Missing decoupling, wrong footprint, impedance out of spec. Flagged inline, in the editor, with the fix one keystroke away.

Cherry Blossom
AI Assistant
Add a 10k pullup to VCC
Connect all grounds
2/4 locked
dark
Cherry Blossom
AI Assistant
Add a 10k pullup to VCC
Connect all grounds
2/4 locked
cherry-on-dark
Cherry Blossom
AI Assistant
Add a 10k pullup to VCC
Connect all grounds
2/4 locked
light

Cherry-on-dark theme

A dark editor with one cherry accent. Built for long sessions and screen-shareable on a livestream.

AI Assistant
You
BLDC motor controller. ESP32-S3, hall sensors, 24V at 5A. Plan it block by block.
Claude
Drafted a four-block roadmap: Power input → 3V3 rail → Gate drive → Hall sensing. Two are locked, gate drive is up next.
Circuit updated · +12 components
claude-sonnet-4-6·anthropic
Iterate on Gate drive... (approve when ready)

Text-file source

Schematics compile from a plain-text, Git-versionable format. Diff them in PRs and review every change line by line.

AI Assistant · ready to export
All four design blocks locked. Harness clean. Ready to ship to JLC.
Export Circuit
JLCPCB Fab Pack
Gerbers · drill · BOM · CPL — quote-ready
.zip
tscircuit TSX
tscircuit-compatible TSX source
.tsx
BOM CSV
Designator · Type · Value · Footprint
_bom.csv
Project JSON
Full project with layout data
.cherryblossom.json
Exporting: bldc-controller · 47 components · 89 traces

Export to your fab

One click to JLCPCB-ready Gerbers and BOM. OSH Park and MacroFab profiles built in.

What gets caught

Eight silent killers.
One verification gate.

DRC catches geometry. It does not catch the kind of bug that costs a re-spin. These are the eight Cherry Blossom catches that your EDA tool will let through.

01

Wrong-package footprint

AI imported an 0805 cap where the layout needed 0603. Caught before the BOM. DRC would have passed it.

02

Missing pull-ups on open-drain

Every open-drain output gets a pull-up to its expected rail. Missing one flags as a hard error, not a warning.

03

Thermal relief on power pads

High-current pads without thermal relief overheat the iron and starve the joint. Cherry Blossom flags pads carrying more than 1A without relief.

04

Silkscreen on pad

Silkscreen ink on a pad means a cold joint. Cherry Blossom checks every reference designator against every pad outline.

05

Controlled-impedance miscalc

Differential pair widths and gap pulled from the JLCPCB stackup. If the calc is off for your stack, it tells you what to change.

06

Decoupling below datasheet rule

Per-IC decoupling rules pulled from the part datasheet. 100nF + 10μF close to VDD, every time. Missing caps flag inline.

07

Missing ESD on USB nets

Any net touching a USB connector gets ESD/TVS protection or the verification gate blocks the export.

08

EN-pin handling on regulators

Floating EN pins kill regulators silently. Cherry Blossom checks every EN against the datasheet's enable strategy.

Case study — anonymized at the user's request

“A custom-component board taped out at $40K. A thermal miscalculation killed half of it. Four weeks of rework. Twenty thousand dollars on the floor.”
EE intern, major chip manufacturerStory retold with permission. Identifying details removed.
$40KTape-out cost
$20KWritten off
4 weeksProject slip

The verification gate Cherry Blossom puts behind every AI part import is the gate this board never had. We built the tool so the next intern doesn't have to learn this on the company's dime.

bldc-motor-controller.tsx
v0.3
BLDC motor controller
ESP32-S3DRV8313AS5048A
verified$42 @ JLC
Design Blocks4/4 locked
Power input
MCU + USB
Sensing
Status LEDs

BLDC motor controller

Three-phase inverter, ESP32-S3 brain, USB-C input. End to end from one prompt. Tune the gate-drive timing for your motor and re-verify in seconds.

Build this in the beta
usb-c-pd-trigger.tsx
v0.2
USB-C PD trigger
STUSB450020V/3AUSB-C
verified$12 @ JLC
Design Blocks4/4 locked
Power input
MCU + USB
Sensing
Status LEDs

USB-C PD trigger

Pulls 20V at 3A from a USB-C source for a bench supply. Real parts, real soldering, real $12 fab on JLCPCB.

Build this in the beta
esp32-dev-board.tsx
v0.1
ESP32 dev board
ESP32-S3USB-CStemma QT
verified$8 @ JLC
Design Blocks4/4 locked
Power input
MCU + USB
Sensing
Status LEDs

ESP32 dev board

Minimal ESP32-S3 with USB-C, two LEDs, and a Stemma QT connector. The first board a new EE should fab.

Build this in the beta
How we keep you in control

Honest defaults.
No surprises in the EULA.

Local-first

The editor runs on your machine. Only opt-in harness queries leave it.

Your designs are not training data

Written into the design-partner agreement, not deferred to a future privacy update.

Bring your own model

Wire in your Anthropic, OpenAI, or self-hosted endpoint for the compiler. The harness stays in-house.

Your output is yours

The schematics and Gerbers Cherry Blossom generates are yours to fab, audit, or take anywhere. No lock-in.

Integrations

Use your existing fab,
editor, and repo.

KiCad

KiCad

Open Cherry Blossom exports as .kicad_sch and .kicad_pcb. Route, simulate, and finish in the editor you know.

Learn more
JLCPCB

JLCPCB

One-click BOM and Gerbers. The DRC engine knows their drill sizes and assembly rules, so the quote comes back clean.

Learn more
OSH Park

OSH Park

Purple-board export profile built in. Min trace, min via, soldermask color. Checked in the editor, not at the quote.

Learn more
MacroFab

MacroFab

Send a board for full assembly without re-formatting. BOM, placement files, and panelization in one upload.

Learn more

Design partner program

We work with 10 to 20
design partners. Be one.

Early access. Weekly calls with both founders. Your boards shape the roadmap. Free during v0.1.

Apply to be a design partner
Download the beta →